In the 1980s, Serial Peripheral Interface (SPI) by Motorola and, in 1982, Inter-Integrated Circuit (I²C) by Philips (now NXP) began to emerge as standardized peripheral communication methods. In the 40+ years since then, we’ve reached a point where billions of microcontrollers and processors use these kinds of peripherals on a daily basis: the elevator controller that sends you to the 40th floor in an instant, the system that lets you roll down your car window at the push of a button, and so many more.

If you examine the landscape of hardware peripherals from Microchip, STM32, Renesas, and other MCU manufacturers, you’ll often find detailed tables showing the number and types of peripherals supported. However, most of these peripherals are implemented using ASICs (Application-Specific Integrated Circuits), meaning they are fixed at the silicon level. Because they limit you to the specific combinations they support, issues can arise when multiple peripherals are used simultaneously. To work around these limitations, engineers sometimes resort to bridging multiple microcontroller subsystems with Linux-compatible microprocessors just for the sake of interfaces.

This approach becomes especially problematic in more complex systems like robotics, drones, and emerging industries that demand dozens of peripherals, often in unique combinations. Each application might require a slightly different set of interfaces, and ASIC designers typically choose the most common or in-demand combinations to cater to broader markets. But the moment you want to switch, say, from I²C to I³C, you’re forced to change the entire chip. This means redesigning both your hardware and firmware from scratch. That’s why we see hundreds of different MCU models—mostly due to varying peripheral configurations.

At Vicharak, we’re thrilled to announce the launch of Periplex, a groundbreaking tool that transforms how developers interact with hardware peripherals. Periplex allows you to define and deploy complex peripheral configurations through simple JSON, automatically generating both the FPGA design and the Linux kernel drivers without any specialized hardware knowledge.

The Hardware Integration Challenge Example

Consider building an autonomous robot. As described earlier, you would traditionally need:

• A central microprocessor
• Multiple MCU-based subsystems for different hardware peripherals
• Complex wiring between components
• Custom drivers for each peripheral
• Weeks of integration work

And think of adding a new peripheral, like a CAN bus, mid-development? That means sourcing new microcontrollers, creating bridge circuitry, and writing additional driver code—a time-consuming process that slows innovation.

The FPGA Promise (and Problem)

Field Programmable Gate Arrays (FPGAs) offer a theoretical solution. They allow developers to design custom chip functionality without the expense of ASIC fabrication. While FPGAs can’t match ASICs in power efficiency or raw speed, they’re ideal for applications requiring flexibility and customization.

But FPGA development traditionally comes with significant barriers:

• Massive development environments (Vivado alone is 200 GB)
• Steep learning curves for hardware description languages (Verilog/SystemVerilog)
• Complex toolchains that intimidate software developers
• Time-consuming design iterations

As one frustrated developer put it: "To develop software first, you have to learn to write your own compiler."

Periplex: Hardware Configuration as Simple as JSON

Periplex eliminates these barriers with a revolutionary approach: hardware peripherals defined through simple JSON.

With Periplex, implementing 6 UARTs, 4 SPI interfaces, and 2 I²C buses takes minutes instead of months. No EDA tools, no Verilog knowledge, no hardware description languages—just straightforward JSON configuration.

Here’s how it works:

1. Define your peripherals and pin assignments in a JSON file
2. Run Periplex to generate the FPGA design and that's it!.
3. Access your new hardware peripherals directly through standard Linux interfaces (/dev/tty, etc.)

What would take 6 months with traditional development flows takes just 2-3 minutes with Periplex.

Vaaman: The Ideal Hardware Platform

Periplex is optimized for our Vaaman Reconfigurable Computer—an SBC with integrated FPGA designed specifically for next-generation applications.

Unlike other SoC FPGAs that pair FPGAs with underpowered CPUs (typically 4-core ARM Cortex A53 at 1.5GHz), Vaaman features:

• High-performance 6-core CPU (2× ARM Cortex A72 + 4× A53) reaching 2GHz
• Integrated FPGA fabric
• Rich peripheral set matching consumer SBCs
• Seamless software/hardware integration

Beyond Prototyping: Production-Ready Solutions

Periplex isn’t just a prototyping tool—it’s a production-ready solution that:

• Automatically emulates Linux kernel drivers for your custom peripherals, eliminating the need to develop custom protocols.
• For example, serial driver emulation provides native /dev/tty support, allowing you to access FPGA UART across browsers, applications, and programming languages.
• Enables unlimited reconfiguration as your requirements evolve.
• Eliminates months of hardware/software integration work.

Current Periplex-Supported Peripheral List

• UART
• I²C Master
• SPI Master
• I²C Slave
• I2S Master
• I2S Slave
• PWM
• GPIO
• WS2812B (Addressable LEDs)
• One-Wire Master

Periplex Introduction & live Demo Video

With this in mind, you can generate a million combinations of different peripherals using Periplex, which is pretty groundbreaking.

Documentation

You can have a look at our Periplex documentation and examples here.

What’s Next?

Currently, Periplex supports a core set of essential peripherals, with more being added regularly. We’re committed to expanding the library to cover the full spectrum of embedded system requirements. For example, I³C, USB2.0, JTAG, are upcoming peripherals.

In Essence

Periplex represents a fundamental shift in hardware design philosophy: designing custom hardware peripheral chips through simple JSON. We’re eliminating the artificial boundary between hardware and software development, empowering a new generation of creators to build the next wave of intelligent systems.

Welcome to the future of hardware development.