There’s been a lot of exciting activity with the TinyFPGA EX in recent months and I would like to summarize recent progress, the current state of development, and future plans. Read the full update to catch up on all the latest developments!

New Prototypes

New prototype PCBs came back from PCBWay. Despite an issue with the soldermask caused by the KiCad export, they were a breeze to assemble and get up and running!

There were a number of issues with the previous prototypes that needed to be fixed along with some component changes to be tested out. The major changes:

• The FPGA core power regulator can now be configured for either 1.1 V or 1.2 V, depending on the variant.
• The 1.8 V power regulator has been eliminated. All IO banks are now on 3.3 V and the HyperRAM has been moved to 3.3 V as well.
• The 200 MHz reference clock source has been changed to a smaller and more integrated design from Abracon.
• Many passives are now using smaller 0201 package sizes to improve layout and decoupling characteristics.
• All USB Type-C connector pins have been broken out along with footprints for pull-up/-down resistors to be hand-soldered on to the CC nets. This should aid in certain types of USB Type-C hacking.
• JTAG connector is now finalized on the 2x3 pin, 1.00 mm pitch surface mount connector. I've designed a 1.00 mm pitch to 2.54 mm pitch adapter that allows more standard connectors to be used.

I’ve assembled the latest prototypes by hand and have enlisted the help of some members of the community to assemble even more. These early prototypes will go out to more folks to build early projects and demos to put the design through its paces.

Updated Variants

Along with fixing some bugs in the previous batch of prototypes, some new features have been added and changes have been made to the specs of the variants. The major changes:

• Wider range of FPGA chips. The most economical variant is now the EX12, it provides much of the goodness of the EX line of boards at a very competitive price! The mid-range variant is now the EX45 while the high-end is still the EX85-5G.
• Upgraded HyperRAM on the EX85-5G, it now comes with 128 MBit of HyperRAM.
• More IOs! The updated design provided space for 6 more IO pins on the bottom of the board. This was possible by changing to 3.3 V HyperRAM, removing the 1.8 V regulator, and changing the 200 MHz reference clock to a more integrated solution.

Open Source Tools

Project Trellis has made excellent progress in supporting the FPGAs used in the TinyFPGA EX series. All of the major features of the FPGA are now supported, including the SERDES! The first stable release was made on March 6th, 2019.

The open source tools are moving at a fantastic pace and already support real-world designs on these larger FPGAs. For example, the USB bootloader can now be built using Yosys, Project Trellis, and NextPNR.

Next Steps

There are a number of things that need to happen before the campaign can be launched:

1. The PCB layout and power delivery network for the SERDES on the EX85-5G needs to be proven. I am working with some contacts to help make this happen.
2. The HyperRAM needs to be brought up with a known working design.
3. Large, power-hungry designs need to be tested to stress the power delivery network.
4. Testing strategy needs to be finalized.
5. Need more prototypes built to send out to testers and early reviewers.

I have a plan for each of these items. I’ll be sending out an update in a month with an updated status. I’m excited to get this project moving faster and out to makers all over the world! The TinyFPGA EX is a fantastic FPGA board and will enable many new projects!