Several people requested 3D model files for XTRX to make sure that boards they design have enough space to fit it in, so we’re publishing the latest version now that the XTRX rev4 design is finalized:

• STL model (ZIP, 42 MB)
• Step model (ZIP, 1.6 MB)

XTRX mostly follows the Mini PCIe standard recommendations for size, with the only the exception being a larger height of the top side. We couldn’t find a good RF shielding cage and good baluns to fit into the 2.5 mm height recommended by the Mini PCIe standard, so this part of XTRX has a height of 3.6 mm.

We’re also publishing pinouts for XTRX and its various connectors:

• Connectors pinout (PDF, 158 KB)
• GPIO pins functions (PDF, 97 KB)

PS: Make sure you’re gettng the latest version of the docs from https://github.com/xtrx-sdr/xtrx-docs.